Ice_fpga

FPGA I/O and control. More...

Functions
int	ice_fpga_init (const ice_fpga fpga, uint8_t freq_mhz)
	Let the FPGA start and export a clock for it over ICE_FPGA_CLOCK_PIN.
int	ice_fpga_start (const ice_fpga fpga)
	Release the stop mode if it was present, and wait that the FPGA confirms its startup with ICE_FPGA_CDONE_PIN.
int	ice_fpga_stop (const ice_fpga fpga)
	Set the ICE_FPGA_CRESET_B_PIN to LOW which keeps the FPGA in reset mode.
int	ice_fpga_deinit (const ice_fpga fpga)
	deinit and free FPGA and associated resources

Detailed Description

FPGA I/O and control.

Depending on the RTL loaded onto the FPGA, it can use its internal RC oscillator or a more accurate clock signal provided by the RP2040. This library allows to configure this signal, control the FPGA startup, and communicate over SPI to the same pins used for SRAM or FLASH access. An LED pin is used for communicating with the FPGA.

Function Documentation

ice_fpga_deinit()

int ice_fpga_deinit

(

const ice_fpga

fpga

)

deinit and free FPGA and associated resources

Returns

0 on success, negative on fail

ice_fpga_init()

int ice_fpga_init	(	const ice_fpga	fpga,
		uint8_t	freq_mhz
	)

Let the FPGA start and export a clock for it over ICE_FPGA_CLOCK_PIN.

Parameters

freq_mhz

Exported clock frequency in MHz. Valid values: 48MHz, 24MHz, 16MHz 12MHz, 8MHz, 6MHz, 4MHz, 3MHz, 2MHz, 1MHz.

The RP2040 exports its own crystal-based clock to the iCE40, through the dedicated CLOCK GPOUT0 feature.

Returns

0 on success, negative on fail

ice_fpga_start()

int ice_fpga_start

(

const ice_fpga

fpga

)

Release the stop mode if it was present, and wait that the FPGA confirms its startup with ICE_FPGA_CDONE_PIN.

Returns

0 on success, negative on fail

ice_fpga_stop()

int ice_fpga_stop

(

const ice_fpga

fpga

)

Set the ICE_FPGA_CRESET_B_PIN to LOW which keeps the FPGA in reset mode.

Returns

0 on success, negative on fail